Job title: Senior Verification Engineer
Job type: Contract
Emp type: Full-time
Industry: Semiconductor
Pay interval: Hourly
Pay rate: Negotiable
Job published: 02/02/2026
Job ID: 207584

Job Description

Job Title: Senior Verification Engineer (Remote / Hybrid)

Location: Europe (EU countries only) – Remote or Hybrid (onsite presence at project start required)

Duration: Minimum 1 year, with renewal until 2031

Start Date: March 2026

About the Project:
Edison Smart are seeking experienced Senior Verification Engineers to join a long-term, EU-funded project focused on hardware and system verification. The project involves verifying complex ASICs and SoCs, with a focus on high-speed interfaces and embedded protocols.

Responsibilities:

  • Lead block/system-level verification using UVM methodology
  • Develop and implement verification plans and testbenches
  • Perform coverage analysis, assertions, and regressions
  • Verify AMBA protocols (APB, AHB, AXI) and internal interfaces
  • Integrate and work with reference models written in C/Python
  • Collaborate with cross-functional teams to ensure verification completeness
  • Work independently with minimal guidance

Requirements:

  • 10+ years of experience in hardware verification
  • Strong background in SystemVerilog, UVM, and verification methodologies
  • Proven experience with AMBA protocols (APB, AHB, AXI)
  • Experience with complex reference models in C/Python
  • Familiarity with verification tools: Synopsys VCS, Git, Jira, Confluence
  • Ability to work remotely or in a hybrid model, with onsite presence at project start
  • Excellent communication skills in English; Romanian language skills are a plus

Preferred Qualifications:

  • Experience with high-speed interfaces such as PCIe, USB4, Ethernet, DisplayPort
  • Knowledge of formal verification tools (JasperGold, OneSpin)
  • Experience with safety-critical and mixed-signal verification